Renesas Electronics: Staff/ Sr Staff/Principal Engineer, STA — Bengaluru, KA, India

About Renesas Electronics

Renesas Electronics develops semiconductors for automotive, industrial, infrastructure and connected-device applications. Its employer description identifies microcontrollers, system-on-chip devices, analogue components and power products within its portfolio. These components form part of electronic systems made by other manufacturers. Renesas also describes combining complementary products into solutions for customers, connecting individual chips with the needs of an end application. Its business therefore involves both semiconductor technology and how that technology is used in wider electronic products.

The position and its setting

Renesas Electronics lists Staff/ Sr Staff/Principal Engineer, STA in Bengaluru, KA, India, under reference 20031335_2026-07-21. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.

• Employment type: Full-time
• Employer listing date: 14 October 2026
• Brands: Renesas Electronics

Responsibilities and work described

• We are seeking a seasoned Backend Design Expert specializing in Static Timing Analysis (STA) and Logic Synthesis
• Own the RTL-to-Gate conversion, constraint development, and final timing closure, ensuring our chips deliver maximum performance at the lowest possible power and area
• Physical-Aware Synthesis and PPA optimization: Own and execute hierarchical synthesis flows to translate SystemVerilog RTL into optimized gate-level netlists
• Execute physical-aware and floorplan-driven synthesis flows to minimize post-layout congestion and achieve PPA targets, identify bottlenecks and drive optimizations (e.g., critical path restructuring, datapath optimization)
• Research / execution: flat and hierarchical synthesis, ensuring seamless interface timing budgets
• Management: formal verification (LEC) to ensure logical equivalence between RTL and netlist
• UPF management for multiply power domains
• Timing Closure & STA: Perform block-level and full-chip STA across multi-mode and multi-corner (MMMC) scenarios using industry-standard tools
• Collaboration: with PNR team, understand the clock tree and provide timely feedback to optimize the clock tree and achieve best QOR and perform STA signoff checks to closure
• Constraint Development: Architect, validate, and manage files, addressing both functional and DFT modes
• Development: and manage comprehensive block-level and top-level constraints (SDC / UPF)
• Low-Power Implementation: Implement and verify UPF-based (Unified Power Format) low-power architectures and multi-voltage domains
• Programming/Scripting: scripting skills in Tcl, Python, or Perl to automate flows and improve design methodologies

Essential requirements and candidate background

• Experience: about 8-13 years in synthesis and STA closure
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• Understand design specifications, can contribute to design planning, partitioning, and setup a feasible seed for convergence PD cycle
• Extensive experience in STA closure on complex design with ability to understand the clocks structure from both functional and DFT side and provide solutions to complete design closure
• Worked on synthesis of high frequency designs and come up PPA solutions to meet the targets
• Good understanding of EDA tools such as Fusion Compiler, Innovus, Primetime, Tempus, VCLP, LEC
• Understanding: static timing analysis, power analysis, and signal integrity analysis
• Problem-solving skills and attention to detail
• Scripting skills and development of utilities to reduce overall TAT
• Work effectively in a team environment and communicate clearly with cross-functional teams

Preferred experience and additional strengths

• Experience: mentoring and coaching junior engineers is a plus

Location, schedule and contract conditions

• Work arrangement: On-site
• Advertised location: Bengaluru, KA, India

Pay and application dates

A verified salary figure is not established in this article. An online estimate for another Staff/ Sr Staff/Principal Engineer, STA vacancy is not an offer for reference 20031335_2026-07-21; use the employer’s own pay disclosure and recruitment communication.

A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.

How to apply to Renesas Electronics

Applications follow the official employer page linked below.

Open the official Renesas Electronics posting below and match the title and reference 20031335_2026-07-21.

Compare your qualifications and experience with the essential conditions for the Bengaluru, KA, India position, then read the preferred criteria separately.

Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.

Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.

Practical preparation: Python

Python work is easier to assess through a concrete example than a list of libraries. Explain the problem, the input data, the parts you implemented and how you checked the output. Include a repository or a short technical note when you can share it.

Relevant skills

• Python
• electrical engineering