Renesas Electronics: Principal Digital Engineer (DFT Design) — Bengaluru, KA, India
Renesas Electronics lists a Principal Digital Engineer (DFT Design) opening in Bengaluru, KA, India. The position is listed as full-time. The job description covers communication.
Recruitment overview
| Organisation | Renesas Electronics |
|---|---|
| Post / role | Principal Digital Engineer (DFT Design) |
| Employment type | Full-time |
| Notification / job ID | 20029991_2026-07-07 |
| Job location | Bengaluru, KA, India |
| Work arrangement | Hybrid |
| Educational qualification | Degree / qualification: Masters plus 12+ years or Bachelors plus 15+ years experience in digital design and DFT implementation |
| Experience required | Masters plus 12+ years or Bachelors plus 15+ years experience in digital design and DFT implementation |
| Salary / stipend | See employer notice for pay details |
| Last date to apply | See official notice |
About Renesas Electronics
Renesas Electronics develops semiconductors for automotive, industrial, infrastructure and connected-device applications. Its employer description identifies microcontrollers, system-on-chip devices, analogue components and power products within its portfolio. These components form part of electronic systems made by other manufacturers. Renesas also describes combining complementary products into solutions for customers, connecting individual chips with the needs of an end application. Its business therefore involves both semiconductor technology and how that technology is used in wider electronic products.
The position and its setting
Renesas Electronics lists Principal Digital Engineer (DFT Design) in Bengaluru, KA, India, under reference 20029991_2026-07-07. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.
- Employment type: Full-time
- Employer listing date: 24 August 2026
- Brands: Renesas Electronics
Responsibilities and work described
- This is an opportunity to join a top-notch Power Management IC Team with Renesas leading Automotive Business Unit
- Be part of a very skilled group of engineers who are helping build automotive PMIC products that will power tomorrow’s automobiles
- Design: complex chips that includes various analog and digital control circuitry and work very closely with all aspects of chip design – from writing specifications to developing tests for mass production
- Have an opportunity to work on new designs, insert Lbist and shape the company’s pathway for success
- Your responsibilities, depending on your level of experience and skill level, will be a mix of the following:
- Inserting DFT/Scan on digital logic, ATPG, validating test patterns on pre and post layout gate level netlist
- Delivery: test patterns to TEST engineering team and validating them on silicon
- Inserting Logicbist with industry standard tools
- Improvement: scan coverage and modifying RTL for scan
- Reduce ATE tester time by reducing scan patterns while achieving the required coverage
- Participate in all aspects of digital design flow - Micro-architecture, Design partitioning, RTL Verilog / System Verilog coding, DFT insertion, generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC
- Work: closely with Architects, Design, P&R, Test and Silicon validation teams
- Support: top level test-bench creation for scan and running gate level simulations
- Debug scan pattern fails on ATE and fix the scan patterns
- Writing detailed design documents and help writing DFT specifications, reviewing the specs with different stake holders and own the design to meet the spec
- Organizing and participating in key design reviews and completion of various checklists
Essential requirements and candidate background
- Following are rough guidelines for the qualifications (if you feel you have much more or somewhat less, let that not stop you from applying):
- Required
- Masters plus 12+ years or Bachelors plus 15+ years experience in digital design and DFT implementation
- Must be a team player and yet be an independent thinker with digital design and DFT fundamentals
- Hands on experience in Scan insertion, improving scan coverage, ATPG, experience in Logicbist insertion during synthesis or rtl
- Gate level simulations with test patterns, delivering test patterns to Test engineering team and work closely with them to get the patterns validated
- Must have basic digital RTL coding experience besides synthesis exposure
- Must have experience with at least 8 tapeouts with hands on experience with DFT/Scan
- Ideal candidate will have understanding of synthesizable design, timing constraints and exceptions
- Must have experience with industry standard Synopsys, Cadence, Mentor, Siemens for scan, Lbist insertion and ATPG
- Tetramax experience is a huge plus
- Attention to detail, accuracy and expertise in DFT required
- Must have good written and verbal cross-functional communication skills
- Have an analytical mind - be open to new ideas and have capability to persuade others in convincing and implementing better flows and processes
Preferred experience and additional strengths
- Mixed signal experience highly preferred
- Exposure: automotive test requirements, ASIL, is highly preferred
- Education
- BSEE required (MSEE preferred)
Location, schedule and contract conditions
- Work arrangement: Hybrid
- Advertised location: Bengaluru, KA, India
Conditions requiring the complete notice
Some passages contain complex or combined conditions that have not been reduced to short eligibility statements here. Read the complete linked notice for those passages, including any alternatives, exceptions or restrictions. The concise facts above should not be treated as the full wording of every condition.
Pay and application dates
A verified salary figure is not established in this article. An online estimate for another Principal Digital Engineer (DFT Design) vacancy is not an offer for reference 20029991_2026-07-07; use the employer’s own pay disclosure and recruitment communication.
A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.
How to apply to Renesas Electronics
Applications follow the official employer page linked below.
Open the official Renesas Electronics posting below and match the title and reference 20029991_2026-07-07.
Compare your qualifications and experience with the essential conditions for the Bengaluru, KA, India position, then read the preferred criteria separately.
Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.
Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.
Preparing a relevant example
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Relevant skills
- communication
Important links
| Official notification / job description | Open official page |
|---|---|
| Online application portal | Open official page |
Read the complete official notice before applying. Availability and requirements can change.
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